The 11th IEEE ESTC

SEPTEMBER 9–11, 2026 | HELSINKI, FINLAND

Event Sponsors IEEE ESTC 2026

Special Sessions on Thursday, September 10, 2026

Quantum Chips and Their Packaging

September 10, 9:00 – 10:15am

Moderators:
Mikael Broas, Senior R&D Project Manager, IQM Quantum Computers

Speakers and Abstract

Olli-Pentti Saira
Head of Emerging Technologies, IQM Quantum Computers

Janne Lehtinen
Chief Technology Officer, SemiQon

Clément Godfrin
Research Scientist, imec

Abstract
Quantum computing is expected to revolutionize the traditional way of numerical problem solving. Quantum computers have the potential to solve certain problems exponentially faster than classical computers that opens new significant opportunities and challenges, for example, in data security, physical/chemical simulations (e.g. discovery of new materials or drugs), and large-scale data analyses, just to name a few important fields of application. However, the promise of quantum computing lies not only in its potential for computational speed and power, but also in its ability to tackle problems at levels of complexity that are currently not possible with classical methods.

Unlike classical semiconductor chips that rely on binary logic gates, quantum chips harness the principles of quantum mechanics to process information in fundamentally different ways. Despite the many fundamental differences between quantum and semiconductor computers, there are many similarities in their fabrication techniques, however. In this Special Session on Quantum Chips and Packaging, we explore some of the key aspects of quantum chips and their packaging, highlighting the challenges and advancements in this neighboring field of technology.

Skills Shortage in Electronics Packaging and Case Studies on Addressing It

September 10, 11:00am – 12:15pm

Moderator:
Prof. Thomas Zerna, Dresden University of Technology, Germany

Speakers and Abstract

One of the key factors for establishing and successfully sustaining the semiconductor and packaging industry in Europe is the availability of highly skilled professionals and engineers. Although the labor market—particularly in the high-tech sector—is just as global as the market for goods, concerted efforts to ensure excellent university and vocational training opportunities in Europe are essential.

The presentations in this session examine the prevailing conditions and highlight specific initiatives in this field. A discussion about this and other possibilities is highly welcome.


Guoqi Zhang, Prof., Delft University of Technology, The Netherlands

Title: Workforce Development – the Key Success Factor for European’s backend industry

Abstract: Heterogenous system integration and packaging have always been essential part of global semiconductor value chain. However, they were not considered as technologically challenging and scientifically exciting as the frontend technology. Today, with the semiconductors in transition toward system optimization, the critical bottleneck is shifting from transistor scaling only to heterogeneous system integration, and the semiconductor system architecture is in redefinition. This talk will highlight some observations of “PACK4EU” project, especially on the workforce development, and SWOT analysis and possible solutions will be discussed.


Matti Mäntysalo and Heikki Holmberg, Tampere University, Okmetic, Finland

Title: Workforce Constraints in Microelectronics: Beyond the Talent Gap Narrative

Abstract: Europe’s microelectronics ambitions are increasingly constrained by workforce availability. Using Finland as a case study, this presentation shows that the challenge is not only a shortage of graduates, but a structural misalignment between education and industry needs. Current education pipelines are insufficient to meet projected demand, while demographic trends and talent mobility further limit workforce availability. In addition, evidence from European studies indicates that skill requirements are evolving, with increasing demand for interdisciplinary competencies and new roles across the semiconductor value chain. Existing degree structures often adapt slowly to these changes. We therefore argue that the “talent gap” should be reframed as a system-level problem, requiring coordinated action across education, industry, and policy. Without such changes, workforce limitations risk becoming a major bottleneck for Europe’s semiconductor growth and competitiveness.


Krzysztof Nieweglowski, PhD, TUD Dresden University of Technology, Germany

Title: Teaching of Advanced Technology on Electronics and Photonics in Higher Education using Digital Additive Manufacturing and 3D Printing Techniques – Highlights of EU Erasmus+ Cooperation Partnerships Project TADAM3D-µP

Abstract: The presentation shows new educational pathway for international teaching and learning on advanced engineering technologies in the field of electronics and photonics explored in the EU Erasmus+ Cooperation Partnerships Project TADAM3D-µP. This collaborative project involves three European universities: Wrocław University of Science and Technology (WUST), University of Žilina (UNIZA) and Dresden University of Technology (TUD) and investigates integration of three-dimensional printing (3DP) and additive manufacturing (AM) hands-on activities into university education in the Electrical Engineering field to foster students’ skills in advanced and sustainable fabrication technologies.


Prof. Thomas Zerna, TUD Dresden University of Technology, Germany

Title: STIPT – Semiconductor Talent Incubation Program Taiwan

Abstract: The early recruitment of highly qualified professionals constitutes a key competitive factor —particularly within the high-tech sector— and serves as the foundation for the smooth launch of new production facilities. Drawing on the example of a collaboration between TU Dresden and the semiconductor manufacturer TSMC, this presentation demonstrates how the company is laying intensive groundwork for its investment in Saxony, Germany, including in the realm of human resources, from a very early stage.

The First Five Pilot Lines Launched Under the Chips for Europe Initiative - Where We Are, and What's Next with Respect to Advanced Packaging

September 10, 1:45 –  3:00pm

Moderator:
Steffen Kröhnert, President & Founder, ESPAT-Consulting, Germany

Speakers

Panelists

  1. Andy Miller, Department Director, 3D and Silicon Photonics Technology Development, imec
  2. Dominique Noguet, VP and Senior International Projects Manager, CEA-LETI
  3. Dirk Schumann, Director APECS Pilotline, FMD
  4. Tuomas Lahtinen, Director, SiPFAB, Tampere University 
  5. Peter O’Brien, Head of Research Group, Director of Photonics Packaging Pilot Line, Tyndall National Institute

Representing:

  1. NanoIC – Beyond 2nm leading-edge system-on-chip
  2. FAMES – Fully depleted silicon-on-insulator applications
  3. APECS – Advanced packaging
  4. WBG – Wide band gap materials
  5. PIXEurope – Advanced photonic integrated circuits