IEEE ESTC 2026 Short Courses on September 9, 2026
At IEEE ESTC 2026, we are introducing a completely renewed Professional Development Course (PDC) concept designed to better match today’s fast-evolving skills development needs. Instead of conventional half-day courses, the new format consists of intensive two-hour sprint courses that deliver focused, high-value learning in a compact and well-digestible format.
This approach significantly lowers the cost of participation while maintaining comparable learning content, as compared to the conventional format. In addition, attendees now have the opportunity to explore two different topics within the same time allocation and for the same price as one traditional-format PDC, enabling broader learning and greater flexibility for both specialists and those seeking exposure to new domains.
Information on registration fees for the PDCs can be found here.
PDC Session 1 (08:00–10:15)
- Tiwary & Vuorinen: Solid-liquid Interdiffusion (SLID) – A Novel Interconnection Method for MEMS, Power and RF-devices
- Perfecto: Flip Chip Interconnect
- Ndip & Wöhrmann: Advanced Packages for Emerging Applications: Markets, Materials, Fabrication Processes and RF Design Considerations
Break (10:15–10:30)
PDC Session 2 (10:30–12:45)
»Efficient Thermal Simulations Using Compact Models«
Course leader: Tamara Bechtold, Jade University of Applied Sciences, Germany
Tamara Bechtold obtained her PhD in microsystem simulation from the University of Freiburg, Germany, in 2005. Between 2006 and 2010, Dr.Bechtold worked as a research engineer for Philips Research Laboratories and NXP Semiconductors in Eindhoven, The Netherlands. The objective of her research work was to enhance the standard IC design flow through model order reduction and optimization modules. From 2011 to 2014 she acted as an interim Professor for microsystems simulation at the University of Freiburg, Germany and since 2014 as a lecturer and research group leader at the University of Rostock, Germany. Since 2017 Dr. Bechtold is a full professor for mechatronic systems at Jade University of Applied Sciences in Wilhelmshaven, Germany. Since 2022 she is a managing director of Steinbeis Transfer Center.
Dr.Bechtold is author or co-author of over 150 technical publications in the area of modelling and simulation of micro-mechatronic systems, the lead author of the textbook “Fast Simulations of Electro-Thermal Microsystems: Efficient Dynamic Compact Models”, published by Springer and the main editor of the textbook “System-Level Modeling of MEMS”, by Wiley-VHC book series on Advanced Micro and Nanosystems. Her research interests cover applications of advanced mathematical methods of model order reduction and topology optimization to engineering problems and a multi-physics modelling on the device- and system-level.
Course description:
Heat is generated in almost all technical processes. For example, the integration density in modern electronic systems is so high that their performance is limited by cooling. Microelectronic reliability depends on thermo-mechanical properties of packages. Highly integrated batteries of hybrid electrical vehicles depend on cooling. The properties of electrical machines are determined by the heat losses, etc. These effects can be determined by numerical simulations via e.g., finite element analysis of thermal or thermomechanical fields. However, the key to correctly considering the entire system is a system-level simulation in which compact models are connected to further mechanical, electrical or fluidic components. Furthermore, the compact models can be used for efficient design optimization and control and can be shared along the supply chain, as they protect the IP.
Using industry-relevant examples, this seminar shows the great advantages of compact thermo-mechanical models, explains the underlying theory in a comprehensive way and presents the state-of-the-art software tool “Model Reduction inside Ansys” and working flow.
8:00 a.m. – 10:15 a.m.
»Solid-liquid Interdiffusion (SLID) - A novel interconnection method for MEMS, Power and RF-devices«
Course leader: Dr. Nikhilendu Tiwary and Dr. Vesa Vuorinen
Dr. Nikhilendu Tiwary received his MTech and PhD from Indian Institute of Technology Bombay, Mumbai, India in 2012 and 2019, respectively. He did his post-doc in the Electronics Integration and Reliability group at Department of Electrical Engineering and Automation, Aalto University, Espoo, Finland, where he is currently working as a Staff Scientist. His research interests are in advanced packaging design and reliability, advanced substrates for RF and power applications, and UWBG power devices. He has several publications in journals and conference proceedings on the above topics.
Dr. Tiwary is a member of IEEE, IEEE Electronics Packaging Society (EPS), IEEE Electron Devices Society (EDS) and was a committee member of Young Professionals IEEE Electron Devices Society from mid of 2022 until 2023 and received the Certificate of Achievement from IEEE Electronics Packaging Society in 2022. He is a teacher-in-charge of ‘Heterogeneous Integration’ course at Aalto and was a teacher-in-charge of ‘Design and Analysis of MEMS’ course from 2021-2024. He is also involved in supervision of several master’s and doctoral theses as main and co-supervisor respectively at Aalto University.
Dr. Vesa Vuorinen received his M.Sc. degree 1995 in Materials Science and Engineering and D.Sc. (Tech.) degree in 2006 in the Department of Electronics from the former Helsinki University of Technology. Currently he is working in Aalto University as Principal University Lecturer in the research group of Electronics Integration and Reliability.
During the last decades, his research has focused on materials compatibility in heterogeneous electronic systems. He has also been responsible for teaching physics of failure and reliability assessment in electronics and direct research cooperation with the industrial partners for the last twenty years. He has contributed to two textbooks dealing with interfacial compatibility issues and thermodynamics of solid-state diffusion as well as authored or co-authored about 80 scientific papers or review articles and about 40 conference papers as well as several book chapters.
Course description:
The PDC will introduce the SLID technology, commonly used metallurgies, and compare SLID microbumps with the traditional microbumps such as Flip Chip (FC) and state-of-the-art Hybrid Bonds (HB). SLID microbumps could fill the pitch gap between FC and HB, making it attractive for Heterogeneous Integration and Advanced Packaging applications. Emphasis will be placed on processing related challenges such as process integration, selecting suitable metallization, controlling processing related thermo-mechanical stresses, as well as key reliability challenges. Recent results concerning electromigration reliability and high-frequency performance of SLID microbumps up to 10s of GHz will be presented.
8:00 a.m. – 10:15 a.m.
»Flip Chip Interconnect«
Course leader: Eric Perfecto, IBM Research (retired)
Eric Perfecto has over 40 years of experience working in the development and implementation of C4 and advanced Si packages at IBM and GoblalFoundries. Eric’s responsibilities included UBM and Pb-free solder definition for C4 and u-Pillar interconnect, and yield improvements in C4 and 3D wafer finishing. He holds a M.S. in Chemical Engineering from the University of Illinois and a M.S. in Operations Research from Union College. Eric has published over 80 papers, including two best Conference Paper Awards and the 1994 Prize Paper Award from CMPT Trans. on Adv. Packaging. He holds 60 US patents and has been honored with three IBM Outstanding Technical Awards. Eric was the 57th ECTC General Chair in Reno, NV, and the Program Chair at the 55th ECTC. Eric is an IEEE Fellow; an EPS Distinguish Lecturer and EPS VP of Education.
Course description:
Advanced packaging, such as CSP, FCBGA, 2.5D/3D, HBM packaging, heterogeneous packaging with multiple dies and multiple Si nodes, embedded die packaging, certain wafer level package or panel level packaging, is based on flip chip technologies. Industry-wise in terms of total annual revenue flip chip packaging has grown steadily and already passed wire bond-based packaging.
This course will cover the fundamentals of all aspects of flip chip assembly technologies, including various type of wafer bumping technologies, solder joint formation, non-solder joints and assembly considerations. The course is divided into two sections. The first section focuses on the key steps of flip chip assembly technologies and their associated equipment and materials. The second section dives into the depth of the fundamental aspect of flip chip technology. It will detail the various interconnect technologies used in today’s flip chip assembly. It will discuss the various under-bump metallurgy (UBM) fabrication methods (electroplating, electroless plating and sputtering) and solder depositions methods (electroplating, ball drop, IMS, and solder screening). The course will cover the various failure modes related to bumping, such as barrier consumption, Kirkendall void formation, non-wets, BEOL dielectric cracking, etc. The course will conclude with fine pitch technologies, mainly u-Pillar and Hybrid bonding.
Course Outline:
- Introduction to Flip Chip Technologies
- Flip Chip Technologies: Mass Reflow vs Thermal Compression Bonding
- Underfill, Package Warpage Control, and Yield Detractors
- Bumping Ground Rules
- Flip Chip Under-Bump Metal and Intermetallic
- Flip Chip Solder Deposition Processes
- Cu Pillar Technology
- Hybrid Bonding
Who Should Attend:
The goal of this course is to provide a comprehensive understanding of flip chip fabrication and its use on the various advanced packages. Students are encouraged to bring topics and technical issues from their past, present, and future job function for group discussions.
8:00 a.m. – 10:15 a.m.
»Advanced Packages for Emerging Applications: Markets, Materials, Fabrication Processes and RF Design Considerations«
Course leader: Ivan Ndip, Fraunhofer IZM/Brandenburg University of Technology and Markus Woehrmann, Fraunhofer IZM, Germany
Ivan Ndip is a full Professor at the Brandenburg University of Technology (BTU) in Germany. He is also with Fraunhofer IZM (since 2000) where he currently leads the Department of RF & Smart Sensor Systems in Berlin and the IZM Branch Lab for High-Frequency Sensors and High-Speed Systems in Cottbus.
Professor Ndip has been teaching Professional Development Courses to hundreds of engineers and scientists for over 15 years. He is an author and co-author of 250+ publications in journals and conference proceedings, and has more than 35 German, European and US patents. His research has been honored with numerous national and international awards. He is a Fellow and Life Member of IMAPS and served on the IMAPS Executive Council as Director from 2016 to 2020. He is also a Senior Member of IEEE.
He studied electrical engineering and obtained his Dipl.-Ing. (M.Sc.), and Dr.-Ing. (PhD) from TU Berlin. He received a second doctorate degree, Dr.-Ing. habil., also in electrical engineering from BTU Cottbus-Senftenberg.
Markus Wöhrmann received the M.Sc. in electrical engineering from the Technical University of Berlin in 2010. Since 2010, he has been working on electrical and mechanical property estimation of thin film layers at the Technical University of Berlin. In 2016, he joined the Fraunhofer Institute for Reliability and Microintegration (IZM). He leads the group “Lithography and Thin Film Polymers for Wafer-Level-Packaging” at the Fraunhofer IZM since 2019, where he is responsible for process development of RDL processing for Fan-In and Fan-Out Wafer Level Packaging.
Course description:
In this course, participants will learn how advanced packaging technologies enable the development of hardware components and modules for emerging applications, particularly mobile and consumer, wireless infrastructure (e.g. for 5G, 6G), automotive radar, high-performance computing (HPC) and AI applications. The focus will be on advanced packages such as fan-out wafer/panel-level packages (FO-WLP/PLP) with multilayer RDL, chiplets, organic packages, die-embedded packages as well as on interposers (e.g., silicon, glass, polymer). Materials and processes used for the fabrication of these packages will be extensively discussed. Furthermore, RF, signal and power integrity design considerations of advanced packages for automotive, 5G and future 6G communication, HPC and AI applications will be presented. An overview of markets for advanced packaging will also be discussed. Finally, examples of packages and components designed and manufactured at Fraunhofer IZM, will be presented.
Course Outline:
- Key applications driving advanced packaging
- Overview of markets for advanced packaging and key players in supply chains in these markets
- Materials and fabrication processes for advanced packages: Fan-out wafer/panel level packages with multilayer RDL, chiplets, embedded die packages and interposers (e.g., glass, silicon, polymer)
- RF, signal and power integrity design considerations of advanced packages for automotive, 5G and future 6G communication, HPC and AI applications
- Examples of advanced packages and components designed and manufactured at Fraunhofer IZM
Who Should Attend:
Engineers, scientists, researchers, designers, managers, and graduate students interested in advanced packaging technologies as well as those involved in electrical design, layout, fabrication and/or system-integration of packages and chiplets should attend.
8:00 a.m. – 10:15 a.m.
»From Material Behavior to Reliability: Characterizing Epoxy Molding Compounds for Power Electronics and Heterogenous Integration in Harsh Environments«
Course leader: Przemyslaw Gromala, Robert Bosch Kft, Mobility Electronics, Budapest
Przemyslaw Gromala is a senior expert and R&D project leader at Robert Bosch Kft, Mobility Electronics in Budapest. His research activities focus on implementation of the simulation driven co-design for electronic control modules and electronic packaging and advanced packaging. His technical expertise includes Virtual DoE, material characterization and modeling, physics of failure simulation, validation techniques, and prognostics and health management. Prior joining Bosch Mr Gromala worked at Delphi in Krakow, as well as at Infineon in Dresden. He holds a PhD in mechanical engineering from Cracow University of Technology in Poland. Przemyslaw Gromala is member of the IEEE EPS Board of Governors and Vice General Chair the IEEE EPS Premier 76th ECTC 2026 Conference. He is a chair of the IEEE EPS Germany section.
Course description:
Epoxy molding compounds (EMCs) are key materials in automotive power electronics and heterogeneous integration, where thin packages, high power densities, and complex assembly processes strongly influence mechanical reliability. In advanced automotive applications, EMCs are used not only at component level but also for partial or full encapsulation of power modules and electronic control units.
This course focuses on material characterization of EMCs with direct relevance to thermo‑mechanical simulation and reliability prediction. Emphasis is placed on understanding EMC behavior across the full temperature range relevant for assembly and operation, including curing, coefficient of thermal expansion, viscoelasticity around the glass transition temperature, and aging effects.
Participants will gain a practical understanding of which material properties are essential, how they should be measured, and how they can be used effectively in simulation models for power electronics and heterogeneous automotive systems.
- Introduction and Automotive Context (15 min)
- Role of EMCs in power electronics and heterogeneous integration
- Reliability challenges in automotive applications
- Why material characterization matters for simulation accuracy
- Material Selection and Key Influencing Mechanisms (15 min)
- Qualitative screening of EMCs for power and system‑level encapsulation
- Dominant thermo‑mechanical effects and failure drivers
- EMC Material Characterization Essentials (45 min)
- Curing shrinkage and residual stress generation
- Coefficient of thermal expansion (CTE)
- Linear viscoelastic behavior at low temperatures
- Impact of thermal aging
- From Material Data to Simulation Models (30 min)
- Translating test data into simulation inputs
- Validation and calibration strategies
- Typical pitfalls and accuracy limitations
- Summary and Key Takeaways (15 min)
- What level of characterization is “good enough”
- Practical recommendations for engineers and project teams
10:30 a.m. – 12:45 p.m.
»Improving Thermal Management in 3D packaging via Bulk and Interfacial Heat Transport«
Course leader: Joana Catarina Mendes – Instituto de Telecomunicações, University of Aveiro, Portugal
Co-author: Christo Bojkov – UT Dallas, USA
Joana Catarina Mendes has extensive experience in advanced electronic packaging and thermal management as a researcher at the Institute of Telecommunications, Aveiro, Portugal. Her work focuses on the integration of synthetic diamond into semiconductor devices and packages, addressing heat dissipation challenges in high power density AI, HPC, and RF systems. She has led and contributed to multiple international R&D projects and has authored over 60 peer reviewed publications.
Joana has developed and studied diamond based solutions for heterogeneous integration, including heat spreaders and interfaces for high performance electronics. She is actively involved in the international community, serving on the Steering Committee of the Workshop on Compound Semiconductor Devices and Integrated Circuits held in Europe (WOCSDICE), and as a member of the IEEE ECTC/AMT sub-committee. She also chaired the 2023 and 2024 editions of the IEEE Signal and Power Integrity Workshop.
Christo Bojkov has over 36 years of experience in the semiconductor industry as Director and Senior technologist at multiple leading Integrated Device Manufacturers (IDM). He has managed large engineering groups in the Front End of line (FEOL) and back end of line (BEOL) FAB facilities with focus on heterogeneous integration of Cu interconnects, Pb-free Flip Chip, Cu-pillars with Cu-RDL, CSP Assembly and Test for high-power high-frequency GaN & GaAs mmWave products.
Christo began his career as a Research Fellow at the Universities of Paris (France), Rome (Italy) and at the Max-Planck Institute (Germany). He provides leadership activities as active committee member at IMAPS and IEEE/ECTC. Christo served as Adj. Faculty at the University of Texas at Dallas in Material science and engineering Department and Technical consultant at Center for Engineering Innovations (CEI). Christo received Dr. Eng. degree form Sofia Institute of Technology, and MS from Texas A&M University, College Station, TX in Thin films and Surface Science.
Course description:
The Course is intended to introduce the use of diamond heatspreaders for the thermal management of advanced packages. Thanks to their unmatched thermal and electrical properties, the incorporation of diamond heatspreaders in advanced system-in-package (SiP) technologies holds tremendous potential to enhance heat dissipation and improve overall reliability.
During this course the participants will explore the unique properties that make diamond indispensable, review the main fabrication routes for synthetic diamond and their respective advantages and limitations, and learn effective strategies for integration within 2.5D and 3D architectures.
The course will also examine critical technical challenges and reliability aspects. The importance of Thermal Interface Materials (TIM) as promoters of interfacial heat transport and corner stones for enhancing the reliability of diamond-chip pairs will be discussed. The potential of diamond-based composites such as Cu-diamond or Ag-diamond composites will also be presented and strategies for decreasing the implementation cost will be provided.
10:30 a.m. – 12:45 p.m.
»Cu-Cu Hybrid Bonding and Glass Packaging«
Course leader: John H Lau, Unimicron Technology Corporation
John H Lau, with more than 40 years of R&D and manufacturing experience in semiconductor packaging, has published more than 530 peer-reviewed papers (385 are the principal investigator), 52 issued and pending US patents (31 are the principal inventor), and 24 textbooks. John is an elected IEEE fellow, IMAPS Fellow, and ASME Fellow and has been actively participating in industry/academy/society meetings/conferences to contribute, learn, and share.
Course description:
Cu-Cu hybrid bonding is one of the flip-chip Bumpless assembly technologies. The advantages of hybrid bonding are: (a) higher density, (b) finer pad pitch, (c) lower profile, and (d) better performance. In this lecture, some fundamentals and more than 21 high-volume manufacturing (HVM) or to be in HVM products and 12 new applications using hybrid bonding will be presented. On the other hand, glass core substrate has been a very hot topic for high-performance computing driven by artificial intelligence. The advantages of glass packaging are: (a) ultra-high flatness for improved depth of focus for lithography, (b) dimensional stability needed for extremely tight layer to layer interconnect overlay, (c) higher interconnect density, (d) higher mechanical stability for ultra-large form-factor packages with high assembly yield, (e) improved flexibility in setting design rules for power delivery and signal routing, (f) better power delivery solutions while achieving high-speed signaling, (g) higher tolerance for higher temperatures, and (h) higher ability to seamlessly integrate optical interconnects. In the next few years, we will see more implementations of Cu-Cu hybrid bonding and a higher level of heterogeneous integration with glass packaging, whether it is for performance, form factor, power consumption or cost. The content of this lecture is shown below.
- Introduction
- Origin of Hybrid Bonding
- Cu-Cu Hybrid Bonding Fundamentals
- 21 HVM or to be HVM Products with Hybrid Bonding
- 12 New Applications with Hybrid Bonding
- Summary
- Glass Packaging
- Advantages of Glass Packaging
- Disadvantages of Glass Packaging
- Glass Substrates vs. Glass Interposer
- TGV, Metallization, and RDLs Formation
- Flip Chip on Glass Substrates with Microbumps
- Flip Chip on Glass Substrates with Cu-Cu Hybrid Bonding
- Summary
- Potential R&D Topics in Hybrid Bonding and Glass Packaging
Who Should Attend?
If you (students, engineers, and managers) are involved with any aspect of the electronics industry, you should attend this course. It is equally suited for R&D professionals and scientists. The lectures are based on the publications by many distinguish authors and the books (by the lecturer).
10:30 a.m. – 12:45 p.m.
»Integrated Photonic Packaging - Materials, Processes, Equipment, and Scaling to Production«
Course leader: Prof. Peter O’Brien, Tyndall Institute, University College Cork, Ireland
Prof. Peter O’Brien is Head of the Photonics Packaging & Systems Integration Group at the Tyndall Institute, University College Cork, Ireland. He is also the Director of the European Photonics Pilot Line (PIXAPP), the Leader of Advanced Packaging in the new EU Chips Act Photonics Pilot Line (PIXEurope), and the Director of the European Photonics Academy. His group is involved in multiple national, European, and U.S. National Science Foundation (NSF) and DARPA projects, as well as numerous direct industry collaborations. The group specialises in the development and scaling of photonic and electronic packaging technologies—from fundamental simulation and design to prototype development and the transition to pilot-scale production. They apply their expertise to a wide range of applications, including high-speed communications, artificial intelligence, augmented reality, quantum technologies, medical diagnostics, and sensing. Prof. O’Brien previously founded and was CEO of a start-up that manufactured speciality photonic systems for biomedical applications, which he sold in 2009. He was a postdoctoral researcher at the California Institute of Technology and a research scientist at NASA’s Jet Propulsion Laboratory, where he developed submillimetre-wave devices for remote sensing applications. He received his degree and PhD in Physics from Trinity College Dublin and University College Cork, respectively.
Course description:
Integrated photonic modules combine advanced semiconductor technologies with optical and electronic components, motherboards, micro-optics, and thermal management systems to address complex subsystem requirements. They are widely used in applications such as communications (e.g. Co-Packaged Optics), artificial intelligence, augmented and virtual reality, quantum technologies, healthcare, sensing, space, and security. As these modules become more sophisticated, their assembly, packaging, and testing demand advanced techniques to enable reliable, high-volume manufacturing for emerging mass markets. This PDC provides an overview of the key packaging and testing methods for integrated optical modules.
10:30 a.m. – 12:45 p.m.