ESTC 2020 schedules some Special Sessions.
Hot topics in the field of electronic packaging are presented and discussed. Share your experiences and opinions with colleagues.
Rao R. Tummala, Georgia Institute of Technology, USA
Moore’s law has been the driving engine for science, technology, manufacturing, hardware, software, systems and applications, contributing to the prosperity of thousands of individuals, 100s corporations and dozens of countries. As Moore’s Law begins to come to an end, for not only fundamental reasons but also for computing performance , power, cost and investments., it is becoming clear that a different path for electronics systems must emerge. So, while transistor integration on individual 2D ICs was the basis of Moore’s Law for ICs, transistor integration can be extended in 2.5D and 3D by means of interconnections or I/Os s in the short term. This is referred to as Moore’s Law for Packaging. Just like Moore’s Law has both doubling of transistors and simultaneous cost reduction from node to node every 18-24 months, Moore’s Law for system interconnections can do the same. Interconnections have been driven by computing systems and within computing systems, between logic and memory .The new era of artificial intelligence mimicking human brain with several orders better computer performance is yet another reason for the end of Moore’s Law . Human brain is the ultimate systems packaging for highest performance in smallest size with lowest power. Human brain is the new packaging density and efficiency standard that may have to be viewed as more than current 3D architectures. A typical human brain has about 90 billion nerve cells interconnected by trillions of synapses providing trillions of pathways for brain to process info. Moore’s Law for Packaging , therefore must duplicate this architecture.
The packaging or I/Os has historically evolved from DIPs in 1970s with 16 I’Os, QFP in 1980s with 64 I/Os, ceramic packages in 1990s with more than 500 I/Os, laminate packages in excess of 1000 and silicon packages approaching 16,000.Artificial intelligence mimicking human brain may need several orders of magnitude.
Currently, the best Moore’s Law for packaging is with wafer-based silicon packaging . But silicon- based packaging has many limitations at material, device, circuitry and system levels.
The talk describes a roadmap from Moore’s Law for ICs to Moore’s law for electronic and photonic interconnections and eventually to quantum computing.
Prof. Rao Tummala is a Distinguished and Endowed Chair Professor Emeritus at Georgia Tech in USA. He is well known as an industrial technologist, technology pioneer, and educator. Prior to joining Georgia Tech, he was an IBM Fellow, pioneering such major technologies as the industry’s first plasma display and industry’ first 100- chip MCM with leading-edge RDL, flipchip and liquid cooling, now called 2.5D. He is the father of LTCC and System-on-Package(SOP) technologies. As an educator, Prof. Tummala was instrumental in setting up the largest Academic Center in System-On-Package vision for Electronic Systems funded by NSF as the first and only NSF Engineering Research Center in US in Packaging at Georgia Tech.The Center with its integrated approach to research, education and industry collaborations produced more than 1500 engineers and collaborated with more than 200 companies in US, Europe, Japan, Korea, Taiwan and China. He received many industry, Academic and Professional Society awards including Distinguished Alumni of Illinois, Indian Institute of Science and the highest Faculty award from Georgia Tech—The Distinguished Faculty. He has published 800 technical papers and invented many technologies that resulted in over 100 patents. He wrote the first modern textbook in packaging, Microelectronics Packaging Handbook(1988); wrote the 1st undergrade textbook, Fundamentals of Microsystem Packaging(2001); and the 1st book introducing the concept of SOP, Introduction to System-on-Package( 2006). He was Past President OF IEEE CPMT and IMAPS. He is an IEEE Fellow and member of National Academy of Engineering in US.
Bodil Holst, Department of Physics and Technology, University of Bergen, Norway
The ability to pattern materials at ever-smaller sizes using photolithography is driving advances in nanotechnology and electronics, with extreme ultraviolet lithography being the current state-of-the-art. However, the secondary electron blur from the high energy extreme-ultraviolet photons hinders the creation of single molecule (1 nm) patterns. The EU-funded Nanolace project (start up 1 January 2020) aims to demonstrate a breakthrough nanolithography technique: Mask-based atom lithography, which enables fast patterning of arbitrary patterns with nm resolution.
Professor Bodil Holst is a professor of Nanophysics at the University of Bergen. She holds a Ph.D in experimental physics from the University of Cambridge. Bodil Holst research fields ranges from atom optics: lithography and microscopy over nanostructured surfaces to archaeology. In 2019 she was appointed chair of the Kavli Prize committee in Nanoscience.
Kristine Kotte-Eriksen, Diversity & Inclusion Advisor/ Consultant, Norway
Many organisations do great work to empower women's careers in tech.
As important as this work is, it's easy to forget that culture also needs to change to create long lasting results. Organisational cultures can be said to have "masculine" and "feminine" traits, just like men and women.
In many organisations and industries heavily dominated by men, the masculine traits can overshadow the feminine and thus create a culture that rewards masculine behaviour - a behaviour that men fit more authentically into.
How can we balance it out by keeping some of the masculine and give space to more of the feminine? And how can this benefit both men, women and the industry going forward?
The concept of masculinities and femininities is also useful for exploring inclusion at the workplace from other dimensions of diversity than gender.
Kristine Kotte is passionate about creating inclusive organisational cultures. She has a masters degree in Gender Studies from University of Stirling in Scotland, specialising in organisational culture. Her background is in communications and marketing, and she has work experience from the IT industry, science, media, tech startup communities and the Navy.
She believes that gender balance is best achieved through openness, communication and transparency.
Paul Wesling, Hewlett-Packard (retired), IEEE-EPS Distinguished Lecturer, California USA
Silicon Valley is commonly acknowledged as the tech capital of the world. When most people think of the Valley, they probably recall semiconductors, personal computers, software, biotech and self-driving cars. How did Silicon Valley come into being, and what can we learn? The story goes back to local Hams (amateur radio operators) trying to break RCA's tube patents, Stanford "angel" investors, the sinking of the Titanic, WW II and radar, and the SF Bay Area infrastructure that developed -- these factors pretty much determined that the semiconductor and IC industries would be located in the Santa Clara Valley, and that the Valley would remain the world’s innovation center as new technologies emerged and a model for innovation worldwide.
This talk will give an exciting and colorful history of device technology development and innovation that began in Palo Alto in 1909. You'll meet some of the colorful characters -- Cyril Elwell, Lee De Forest, Bill Eitel, Charles Litton, Fred Terman, David Packard, Bill Hewlett, Bill Shockley and others -- who came to define our worldwide electronics industries through their inventions and process development. You'll understand some of the novel management approaches that have become the hallmarks of its tech startups. Many of these attributes can be found, to greater or lesser extent, in other technology hubs; however, the SF Bay Area has five generations of experience, as well as a "critical mass" of talent, making it difficult for others to catch up. The key attributes will be illustrated and analyzed, for consideration by other tech hubs.
Paul Wesling has observed the Valley for decades as an engineer, executive, resident, and educator. He received degrees in electrical engineering and materials science from Stanford University, then worked locally at companies including Lenkurt Electric, Sperry-Univac, and Amdahl, joining Tandem Computers in Cupertino in 1985. His assignments included advanced technology reliability, mainframe testing, design of multi-chip module prototypes, and managing an NSF grant for the development of multimedia educational modules. Paul retired from HP in 2001, then served as “Mr. IEEE” for the San Francisco Bay Area for 10 years. He is a Life Fellow of the IEEE. As vice president of publications for the IEEE Electronics Packaging Society for 22 years, he supervised four archival journals and a newsletter. He received the IEEE’s Centennial Medal, the Board's Distinguished Service award, the Society Contribution Award, and the IEEE's Third Millennium Medal.