ESTC 2026 Short Courses on September 9, 2026
»Efficient Thermal Simulations Using Compact Models«
Course leader: Tamara Bechtold, Steinbeis Transfer Center, Germany
Tamara Bechtold obtained her PhD in microsystem simulation from the University of Freiburg, Germany, in 2005. Between 2006 and 2010, Dr.Bechtold worked as a research engineer for Philips Research Laboratories and NXP Semiconductors in Eindhoven, The Netherlands. The objective of her research work was to enhance the standard IC design flow through model order reduction and optimization modules. From 2011 to 2014 she acted as an interim Professor for microsystems simulation at the University of Freiburg, Germany and since 2014 as a lecturer and research group leader at the University of Rostock, Germany. Since 2017 Dr. Bechtold is a full professor for mechatronic systems at Jade University of Applied Sciences in Wilhelmshaven, Germany. Since 2022 she is a managing director of Steinbeis Transfer Center.
Dr.Bechtold is author or co-author of over 150 technical publications in the area of modelling and simulation of micro-mechatronic systems, the lead author of the textbook “Fast Simulations of Electro-Thermal Microsystems: Efficient Dynamic Compact Models”, published by Springer and the main editor of the textbook “System-Level Modeling of MEMS”, by Wiley-VHC book series on Advanced Micro and Nanosystems. Her research interests cover applications of advanced mathematical methods of model order reduction and topology optimization to engineering problems and a multi-physics modelling on the device- and system-level.
Course description:
Heat is generated in almost all technical processes. For example, the integration density in modern electronic systems is so high that their performance is limited by cooling. Microelectronic reliability depends on thermo-mechanical properties of packages. Highly integrated batteries of hybrid electrical vehicles depend on cooling. The properties of electrical machines are determined by the heat losses, etc. These effects can be determined by numerical simulations via e.g., finite element analysis of thermal or thermomechanical fields. However, the key to correctly considering the entire system is a system-level simulation in which compact models are connected to further mechanical, electrical or fluidic components. Furthermore, the compact models can be used for efficient design optimization and control and can be shared along the supply chain, as they protect the IP.
Using industry-relevant examples, this seminar shows the great advantages of compact thermo-mechanical models, explains the underlying theory in a comprehensive way and presents the state-of-the-art software tool “Model Reduction inside Ansys” and working flow.
»Flip Chip Interconnect«
Course leader: Eric Perfecto, IBM Research (retired)
Eric Perfecto has over 40 years of experience working in the development and implementation of C4 and advanced Si packages at IBM and GoblalFoundries. Eric’s responsibilities included UBM and Pb-free solder definition for C4 and u-Pillar interconnect, and yield improvements in C4 and 3D wafer finishing. He holds a M.S. in Chemical Engineering from the University of Illinois and a M.S. in Operations Research from Union College. Eric has published over 80 papers, including two best Conference Paper Awards and the 1994 Prize Paper Award from CMPT Trans. on Adv. Packaging. He holds 60 US patents and has been honored with three IBM Outstanding Technical Awards. Eric was the 57th ECTC General Chair in Reno, NV, and the Program Chair at the 55th ECTC. Eric is an IEEE Fellow; an EPS Distinguish Lecturer and EPS VP of Education.
Course description:
Advanced packaging, such as CSP, FCBGA, 2.5D/3D, HBM packaging, heterogeneous packaging with multiple dies and multiple Si nodes, embedded die packaging, certain wafer level package or panel level packaging, is based on flip chip technologies. Industry-wise in terms of total annual revenue flip chip packaging has grown steadily and already passed wire bond-based packaging.
This course will cover the fundamentals of all aspects of flip chip assembly technologies, including various type of wafer bumping technologies, solder joint formation, non-solder joints and assembly considerations. The course is divided into two sections. The first section focuses on the key steps of flip chip assembly technologies and their associated equipment and materials. The second section dives into the depth of the fundamental aspect of flip chip technology. It will detail the various interconnect technologies used in today’s flip chip assembly. It will discuss the various under-bump metallurgy (UBM) fabrication methods (electroplating, electroless plating and sputtering) and solder depositions methods (electroplating, ball drop, IMS, and solder screening). The course will cover the various failure modes related to bumping, such as barrier consumption, Kirkendall void formation, non-wets, BEOL dielectric cracking, etc. The course will conclude with fine pitch technologies, mainly u-Pillar and Hybrid bonding.
Course Outline:
- Introduction to Flip Chip Technologies
- Flip Chip Technologies: Mass Reflow vs Thermal Compression Bonding
- Underfill, Package Warpage Control, and Yield Detractors
- Bumping Ground Rules
- Flip Chip Under-Bump Metal and Intermetallic
- Flip Chip Solder Deposition Processes
- Cu Pillar Technology
- Hybrid Bonding
Who Should Attend:
The goal of this course is to provide a comprehensive understanding of flip chip fabrication and its use on the various advanced packages. Students are encouraged to bring topics and technical issues from their past, present, and future job function for group discussions.
»Solid-liquid Interdiffusion (SLID) - A novel interconnection method for MEMS, Power and RF-devices«
Course leader: Dr. Nikhilendu Tiwary and Dr. Vesa Vuorinen
Dr. Nikhilendu Tiwary received his MTech and PhD from Indian Institute of Technology Bombay, Mumbai, India in 2012 and 2019, respectively. He did his post-doc in the Electronics Integration and Reliability group at Department of Electrical Engineering and Automation, Aalto University, Espoo, Finland, where he is currently working as a Staff Scientist. His research interests are in advanced packaging design and reliability, advanced substrates for RF and power applications, and UWBG power devices. He has several publications in journals and conference proceedings on the above topics.
Dr. Tiwary is a member of IEEE, IEEE Electronics Packaging Society (EPS), IEEE Electron Devices Society (EDS) and was a committee member of Young Professionals IEEE Electron Devices Society from mid of 2022 until 2023 and received the Certificate of Achievement from IEEE Electronics Packaging Society in 2022. He is a teacher-in-charge of ‘Heterogeneous Integration’ course at Aalto and was a teacher-in-charge of ‘Design and Analysis of MEMS’ course from 2021-2024. He is also involved in supervision of several master’s and doctoral theses as main and co-supervisor respectively at Aalto University.
Dr. Vesa Vuorinen received his M.Sc. degree 1995 in Materials Science and Engineering and D.Sc. (Tech.) degree in 2006 in the Department of Electronics from the former Helsinki University of Technology. Currently he is working in Aalto University as Principal University Lecturer in the research group of Electronics Integration and Reliability.
During the last decades, his research has focused on materials compatibility in heterogeneous electronic systems. He has also been responsible for teaching physics of failure and reliability assessment in electronics and direct research cooperation with the industrial partners for the last twenty years. He has contributed to two textbooks dealing with interfacial compatibility issues and thermodynamics of solid-state diffusion as well as authored or co-authored about 80 scientific papers or review articles and about 40 conference papers as well as several book chapters.
Course description:
The PDC will introduce the SLID technology, commonly used metallurgies, and compare SLID microbumps with the traditional microbumps such as Flip Chip (FC) and state-of-the-art Hybrid Bonds (HB). SLID microbumps could fill the pitch gap between FC and HB, making it attractive for Heterogeneous Integration and Advanced Packaging applications. Emphasis will be placed on processing related challenges such as process integration, selecting suitable metallization, controlling processing related thermo-mechanical stresses, as well as key reliability challenges. Recent results concerning electromigration reliability and high-frequency performance of SLID microbumps up to 10s of GHz will be presented.
»Improving Thermal Management in 3D packaging via Bulk and Interfacial Heat Transport«
Course Leader: Joana Catarina Mendes – Instituto de Telecomunicações, University of Aveiro, Portugal
Co-authors: Christo Bojkov – UT Dallas, USA and Bill Ishii – Sumitomo Electric USA
Joana Catarina Mendes has extensive experience in advanced electronic packaging and thermal management as a researcher at the Institute of Telecommunications, Aveiro, Portugal. Her work focuses on the integration of synthetic diamond into semiconductor devices and packages, addressing heat dissipation challenges in high power density AI, HPC, and RF systems. She has led and contributed to multiple international R&D projects and has authored over 60 peer reviewed publications.
Joana has developed and studied diamond based solutions for heterogeneous integration, including heat spreaders and interfaces for high performance electronics. She is actively involved in the international community, serving on the Steering Committee of the Workshop on Compound Semiconductor Devices and Integrated Circuits held in Europe (WOCSDICE), and as a member of the IEEE ECTC/AMT sub-committee. She also chaired the 2023 and 2024 editions of the IEEE Signal and Power Integrity Workshop.
Christo Bojkov has over 36 years of experience in the semiconductor industry as Director and Senior technologist at multiple leading Integrated Device Manufacturers (IDM). He has managed large engineering groups in the Front End of line (FEOL) and back end of line (BEOL) FAB facilities with focus on heterogeneous integration of Cu interconnects, Pb-free Flip Chip, Cu-pillars with Cu-RDL, CSP Assembly and Test for high-power high-frequency GaN & GaAs mmWave products.
Christo began his career as a Research Fellow at the Universities of Paris (France), Rome (Italy) and at the Max-Planck Institute (Germany). He provides leadership activities as active committee member at IMAPS and IEEE/ECTC. Christo served as Adj. Faculty at the University of Texas at Dallas in Material science and engineering Department and Technical consultant at Center for Engineering Innovations (CEI). Christo received Dr. Eng. degree form Sofia Institute of Technology, and MS from Texas A&M University, College Station, TX in Thin films and Surface Science.
Bill Ishii is Sumitomo Electric USA (Thermal Solutions Group) Marketing and Sales manager, with over 25 years experience in electronic packaging, assembly, and a focus on semiconductor thermal management components. Bill started his microelectronics career with Kyocera handling IC packaging for the high-reliability market, high-power and high-frequency applications. Assembly experience includes wire bond, flip chip, die attach, and SMT. For the past 10 years with Sumitomo, his work centers on advanced thermal management materials with attention to CTE requirements.
Bill is involved with IMAPS as a Symposium track chair, IEEE EPS’ Assembly & Manufacturing Technology committee (AMT/ECTC), and CMSE as a session chair.
Course description:
The Course is intended to introduce the use of diamond heatspreaders for the thermal management of advanced packages. Thanks to their unmatched thermal and electrical properties, the incorporation of diamond heatspreaders in advanced system-in-package (SiP) technologies holds tremendous potential to enhance heat dissipation and improve overall reliability.
During this course the participants will explore the unique properties that make diamond indispensable, review the main fabrication routes for synthetic diamond and their respective advantages and limitations, and learn effective strategies for integration within 2.5D and 3D architectures.
The course will also examine critical technical challenges and reliability aspects. The importance of Thermal Interface Materials (TIM) as promoters of interfacial heat transport and corner stones for enhancing the reliability of diamond-chip pairs will be discussed. The potential of diamond-based composites such as Cu-diamond or Ag-diamond composites will also be presented and strategies for decreasing the implementation cost will be provided.